We are looking for senior Verification Engineers to join our team in Rabat, المغرب.
you will be a hands-on technical contributor and leader on ASIC / SoC and IP development projects.
You will help architect, تحديد, and lead the implementation of verification projects using high level verification languages.
You will work very closely with ASIC/SoC project leaders to implement complete verification environments and methodologies.
• You will have first class management and team leadership skills;
• You will set standards for the technological development in the company and lead the staff towards its fulfillment;
• You will keep up to date with all the advances in the field and ensure the company is well at the forefront of the state of the art technology, methodologies and processes used in the industry;
• You will provide hands-on expertise in IP and/or SoC level functional verification;
• You will coordinate and communicate with cross functional teams to define and create verification plans;
• You will have a proven track record of delivering ground breaking optimised design solutions in a functional verification;
• You might represent the company at conferences and meetings and present technical papers;
• Analyzing customer technical requirements, proposing solutions, and working collaboratively in a multi-site development environment.
Leadership and Engagement:
• You will have a proven capability as a problem solver with an ability to work individually or as part of a team;
• You will be a subject matter expert within a technical discipline with latitude for decision making;
• You will have first class communication skills and be adept at guiding and developing other team members;
• You will have the ability to mentor and develop team members to create innovative new ideas and promote a highly creative environment;
• Listen to customer feedback, recognize opportunities and provide feedback for technical innovation
• Contribute to technical discussions with customers at all stages of sales interaction and take part in the development of technical documentation.
Metric driven verification, verification planning, functional coverage, code coverage, فيريلوج, Unit level and Top-level verification, testbench architecture design;
• An excellent understanding of the following: SystemVerilog, UVM, ABV, constrained random verification VHDL, PSL, SVA, e VMM, OVM;
• Knowledge of Formal Verification: model checking, CDC;
• Knowledge of power aware verification UPF and or CPF, RTL and gate-level simulation;
• Knowledge of SoC level verification HW/SW co-تحقيق, متعدده-mode simulation;
• Knowledge of Verification infrastructure automation Perl, الثعبان, جافا, TCL, IP-XACT, UCDB;
• Proven capability as a problem solver who can work as part of a team or an independent contributor to a project;
• Capable of evaluating issues, defining solutions and providing advice and guidance to team members.
بكالوريوس, Masters or PhD in a relevant subject with 5 years' worth of experience is essential for this role.